Product Summary
The CY7C1470V33-167AXI is a Synchronous pipelined burst SRAM. It is designed to support unlimited true back-to-back Read/Write operations with no wait states. The CY7C1470V33-167AXI is equipped with the advanced (NoBL) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data in systems that require frequent Write/Read transitions. The CY7C1470V33-167AXI is pin compatible and functionally equivalent to ZBT devices.
Parametrics
CY7C1470V33-167AXI absolute maximum ratings: (1)Storage Temperature: –65℃ to +150℃; (2)Ambient Temperature with Power Applied:–55℃ to +125℃; (3)Supply Voltage on VDD Relative to GND: –0.5V to +4.6V; (4)Supply Voltage on VDDQ Relative to GND: -0.5V to +VDD; (5)DC to Outputs in Tri-State: –0.5V to VDDQ + 0.5V; (6)DC Input Voltage:–0.5V to VDD + 0.5V; (7)Current into Outputs (LOW): 20 mA; (8)Static Discharge Voltage: > 2001V; (9)Latch-up Current: > 200 mA.
Features
CY7C1470V33-167AXI features: (1)Supports 250-MHz bus operations with zero wait states—Available speed grades are 250, 200 and 167 MHz; (2)Fully registered (inputs and outputs) for pipelined operation; (3)Byte Write capability; (4)Single 3.3V power supply; (5)3.3V/2.5V I/O power supply; (6)Fast clock-to-output time; (7)Clock Enable (CEN) pin to suspend operation; (8)IEEE 1149.1 JTAG Boundary Scan compatible; (9)Burst capability—linear or interleaved burst order.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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CY7C1470V33-167AXI |
Cypress Semiconductor |
SRAM 2Mx36 3.3V NoBL PL SRAM |
Data Sheet |
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