Product Summary
The ISPLSI1032E-70LJ is a High Density Programmable Logic Device containing 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ISPLSI1032E-70LJ offers 5V non-vola-tile in-system programmability of the logic, as well as the interconnects to provide truly reconfigurable systems. A functional superset of the ISPLSI1032E-70LJ architecture, the ispLSI 1032E device adds two new global output enable pins.
Parametrics
ISPLSI1032E-70LJ absolute maximum ratings: (1)Supply Voltage Vcc: -0.5 to +7.0V; (2)Input Voltage Applied: -2.5 to VCC +1.0V; (3)Off-State Output Voltage Applied: -2.5 to VCC +1.0V; (4)Storage Temperature: -65 to 150℃; (5)Case Temp. with Power Applied: -55 to 125℃; (6)Max. Junction Temp. (TJ) with Power Applied: 150℃.
Features
ISPLSI1032E-70LJ features: (1)high density programmable logic; (2)6000 PLD Gates; (3)64 I/O Pins, Eight Dedicated Inputs; (4)192 Registers; (5)High Speed Global Interconnect; (6)Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc; (7)Small Logic Block Size for Random Logic; (8)high performance e2cmos technology; (9)fmax = 125 MHz Maximum Operating Frequency; (10)tpd = 7.5 ns Propagation Delay; (11)TTL Compatible Inputs and Outputs; (12)Electrically Erasable and Reprogrammable; (13)Non-Volatile; (14)100% Tested at Time of Manufacture; (15)Unused Product Term Shutdown Saves Power.
Diagrams
ISPL1048E-50LQ. |
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ispLSi 1016 |
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ispLSI 1016-110LJ |
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CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
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ispLSI 1016-60LJ |
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CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
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ispLSI 1016-60LJI |
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CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
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ispLSI 1016-60LT44 |
Lattice |
CPLD - Complex Programmable Logic Devices USE ispMACH 4000V |
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